I thought you might like to see a photo of what the finished boards look like. Here's one TF posted on the GITHub of a finished board running and installed in an A500 during development.
Also, be sure to checkout the newly updated wiki on his GITHub at:
https://github.com/terriblefire/tf530/wiki
FTA:
Introduction
This page is a brief overview of the system architecture of the TF530. The TF530 is an accelerator card for the Amiga 500 series of computers (may work in other 68000 based machines?).
Components/Features
The TF530 has the following
A 68030 CPU Capable of 32Mhz (at present - 24Mhz Recommended).
A PLCC 68881/2 FPU Running Synchronously with the CPU.
2/4Mb of 5V/12ns 32bit SRAM. Configured in the Zorro II address space.
Gayle Emulation ATA Support (7Mhz Clock Domain at present).
Bus Marshaling to the 68000 Socket only when the cycle is not internal to the card.
#TF530CCC
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